Dissertation Defense: Efficient Synthesis Methods for High-Quality Approximate Computing Circuits and Architectures

Date: 2023/05/17 - 2023/05/17

Dissertation Title: Efficient Synthesis Methods for High-Quality Approximate Computing Circuits and Architectures

Speaker: Chang Meng, Ph.D. candidate at UM-SJTU Joint Institute

Time: May 17th from 1:30 p.m., 2023 (Beijing Time)

Location: Room 414B, Longbin Building

Abstract

As complexity of VLSI designs increases and transistor size shrinks, it is increasingly difficult to reduce area, delay, and power of computing systems by conventional design methods. Approximate computing is a novel design paradigm that can improve design quality by introducing small errors. It can be widely applied in error-tolerant applications such as data mining, image processing, and machine learning. This dissertation focuses on developing efficient methods for high-quality approximate computing circuits and architectures. It proposes area- and delay-driven approximate logic synthesis (ALS) methods and acceleration techniques for ALS. It also designs a low-power, high-speed approximate lookup table architecture. The proposed methods advance research on approximate computing and facilitate VLSI designs in the post-Moore era.

Biography

Chang Meng received the B.S. degree in communication engineering from Nanjing University of Science and Technology in 2018. He is currently a Ph.D. candidate at the UM-SJTU Joint Institute, supervised by Prof. Weikang Qian. His research mainly focuses on electronic design automation (EDA), especially the logic synthesis and verification of emerging computing paradigms. He has published 6 top conference and journal papers as the first or co-first author in the field of EDA, including DAC, ICCAD, DATE, and TCAD.