Boosting Deep Learning Accelerators with General-Purpose Computing and Cognitive Reasoning

Date: 2023/06/02 - 2023/06/02

Academic Seminar: Boosting Deep Learning Accelerators with General-Purpose Computing and Cognitive Reasoning

Speaker: Jie Gu, Associate Professor, Northwestern University

Time: 10:30 - 11:30 a.m., June 2, 2023 (Beijing Time)

Location: Room 454, JI Longbin Building


Neural network accelerator has increasingly become a common computing platform in the era of AI and domain specific computing. However, significant amount of computing jobs still require general-purpose computing and programming, e.g. robotics. The existing architecture choices, i.e., Von-Neumann or deep learning architecture represent two distinct solutions which suffer from the tradeoff among programmability, data movement and computing efficiency. One may ask whether there is something in between, which may reconcile the vast differences of the two architectures. In this talk, I will discuss our recent exploration into a special “neural CPU” processor at the conjunction of Von-Neumann and deep learning architectures where general-purpose computing is incorporated into neural processor as well as compute-in-memory design achieving state-of-the-art efficiency for both CNN and CPU operation. Furthermore, I will show that a neural network architecture with separate memory controllers like Von-Neumann architecture can be used for human-like cognitive reasoning for tasks such as context reasoning, relationship deduction, map search where sequential relationships need to be efficiently derived. Test chip results are used to demonstrate the benefits of the proposed architecture.


Jie Gu is currently an associate professor in Northwestern University. He received his B.S. degree from Tsinghua University, M.S. degree from Texas A&M University and Ph.D. degree from University of Minnesota. From 2008 to 2010, he was with Texas Instruments, Dallas, TX working on research of ultra-low power mobile processors for smartphones. From 2011 to 2014, he was with Maxlinear leading developments of home multi-media broadband SoC chips. He joined ECE department in Northwestern University from 2015 working on novel circuit and architecture solution for low power microprocessors and machine learning accelerators. He is a recipient of NSF CAREER award.