The University of Michigan-Shanghai Jiao Tong University Joint Institute (UM-SJTU JI, JI hereafter) undergraduate student team composed of two juniors majoring in Electrical and Computer Engineering, Runxi Wang and Yuqi Gu, claimed the inaugural “Women in Technology” award in the Adaptative Computing Challenge 2021 with their research project entitled “J-Eye: Intramuscular Site Detection for Autonomous Injection”. The student team advised by JI Assistant Professor Xinfei Guo is the only such awardee selected from participants of the global competition ended recently.
Poster of the J-Eye project on the competition website
The demonstration setup and part of the detection result. (Red rectangle is for masked side face detection, the white dot is for the injection site detection)
A conceptual diagram of the J-Eye enabled autonomous vaccination robot
Speaking of the award, Runxi Wang said, “It was truly not easy for us to win the award, considering the fact that the project was largely conducted during a difficult pandemic-hit period in Shanghai. Because of the lockdown arrangement, we had to carry out a lot of work in the dorm instead of research lab. I would like to attribute the achievement to two JI courses, VE270 (Introduction to Digital Logic) and VE370 (Introduction to Computer Organization) that triggered my interests in the area, and the guidance of Professor Xinfei Guo who helped me a lot in grasping knowledge and skills of many software and hardware domains.” Team member Yuqi Gu said the award caught her by surprise. “I got involved in the competition in December last year thanks to the encouragement of Professor Guo. The competition has enabled me to have a deeper understanding of FPGA and wider exposure in the professional field,” said Gu.
The team J-Eye from JI（Left: Runxi Wang, Right: Yuqi Gu）
The Adaptative Computing Challenge competition launched in 2020 by the world’s largest Field Programmable Gate Array (FPGA) supplier AMD-Xilinx and Hackster.io, the world’s fastest growing community dedicated to learning hardware, is the largest annual FPGA design competition catering for worldwide developers.
A total of 554 teams with over 1600 people attended the event this year. The challenge consists of three categories: Edge Computing, Data Center AI and Big Data Analytics. Contestants are required to combine the power of Xilinx adaptive computing platforms with Vivado ML, Vitis unified software platform, and Vitis AI development environment to solve real-world problems in a novel and innovative way. A judge panel composed of leading enterprisers and technical experts selected 14 winning teams based on criteria including idea innovativeness, project presentation, execution quality and business viability potential. The Women in Technology award was established this year for the purpose of fostering diversity in the field of science and technology.
Xinfei Guo is a tenure-track assistant professor at JI. He is a senior member of IEEE. He received his PhD in Computer Engineering from the University of Virginia. He also holds a Master’s degree in Electrical and Computer Engineering from the University of Florida. Before joining JI, he worked at Nvidia and IBM research in US, where he served as a key member to contribute to multiple chip products, including the world-leading BlueField Data Processing Units (DPU) and a total of 7 chip tapeouts that cover a wide range of technology nodes from 180nm to 7nm. His previous work has results in over 30 conference or journal papers in IC design, EDA or FPGA fields. He also published a book. He serves as Associate Editor for Integration, the VLSI Journal, and PC member or chair positions for over 30 international conferences, such as DAC, CICC, ICCAD, ASPDAC, FCCM, HOST and so on. His current research interests include low power and high reliability computing, machine learning-assisted EDA techniques and reconfigurable computing.
Intelligent Circuits, Architectures, and Systems (iCAS) Lab
The iCAS lab aims at solving practical yet challenging research problems in the field of chip design. The research is at the intersections of circuits, architectures and systems. Our research mainly focuses on two thrusts, one is how to design a chip in an intelligent way; Second focus is on how to design an intelligent chip that is energy efficient and reliable. To achieve these goals, we look at the whole system stack and co-design methodologies, and we use AI and machine learning as a powerful tool to facilitate our research. We explore details to understand factors that set the chip design limit, investigate these unknowns with design practices, and develop optimal solutions to overcome these barriers. More details about the lab can refer to https://sites.ji.sjtu.edu.cn/icas.