Courses Detail Information
VE578 – Computer-Aided Design Verification of Digital Systems
Instructor:
Instructors (Faculty):
Credits: 3 credits
Pre-requisites: Ve478 Logic Circuit Synthesis
Description:
Design specification vs. implementation. Design errors. Functional and temporal modeling of digital systems. Simulation vs. symbolic verification techniques. Functional verification of combinational and sequential circuits. Topological and functional path delays; path sensitization. Timing verification of combinational and sequential circuits. Clock schedule optimization.
Course Topics: